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ap 359 8a document number: ds 37261 rev. 2 - 2 1 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product compact dual - phase synchronous - rectified buck controller description the ap3598a is a dual - phase synchronous buck pwm controller with integrated drivers which are optimized for high performance graphic card and computer applications. the i c is capable of delivering up to 60a output current capability, supporting 12v mosfet drivers with internal bootstrap diodes. the dynamic output voltage could be implemented by analog method with a switching device and a resistor network. the adjustable c urrent balance is achieved by r ds(on) current sensing technique. the ap3598a provides over current protection, input/output under voltage protection, over voltage protection and over temperature protection. other features include adjustable soft start, a djustable operation frequency and so on. with aforementioned functions, the ic adopts u - qfn4 0 4 0 - 24 package. features ? operate with single supply voltage ? reference voltage output with 1% accuracy ? simple single loop voltage mode control ? 12v bootstrapped dr ivers with internal boot - strap diodes ? adjustable current balancing by r ds(on) current sensing ? adjustable operation frequency from 200khz to 7 500khz per phase ? external compensation ? dynamic output voltage adjustment ? adjustable soft start ? built - in uv and ov p rotection function ? built - in over current protection ? built - in thermal shutdown function ? u - qfn4 0 4 0 - 24 package ? totally lead - free & fully rohs compliant (notes 1 & 2) ? halogen and antimony free. green device (note 3 ) pin assignments (top view) u - qfn4 0 4 0 - 24 applications ? middle - high end graphic card ? generic desktop and consumer electronics note s: 1 . no purposely added lead. fully eu directive 2002/95/ec (rohs) & 2011/65/eu (rohs 2) compliant. 2. see http://www.diodes.com/qu ality/lead_free.html for more information about diodes incorporateds definitions of hal ogen - and antimony - free, "green" and lead - f ree . 3. halogen - and antimony - free "green products are defined as those which contain <900ppm bromine, <900ppm chlorin e (<1500ppm total br + cl) and <1000ppm antimony compounds. l g a t e 2 p v c c g n d l g a t e 1 p h a s e 1 c o m p v s n s g n d s n s f s v r e f r e f i n refadj vid psi en hgate 1 boot 1 boot 2 hgate 2 pgood vcc talert # tsns pin 1 mark therm / gnd 1 10 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 19 20 21 22 23 24 p h a s e 2 25
ap 359 8a document number: ds 37261 rev. 2 - 2 2 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product typical applications circuit component value unit component value unit component value unit c vcc 10 f r talert 100 k c3 10 pf c pvcc 10 f r tm2 tbd k c 4 2.2 nf c vin1 300 f r tm tbd k c5 1.5 nf c vin2 300 f r hg1 0 c out 330*3 f r pg 100 k c bt1 100 nf r vout 0 r en 100 k r lg1 note 4 r vgnd 0 r fs 33 k r hg2 0 c refin 0.033 f r psi 100 k c bt2 100 nf q1 C C r psi2 0 k r1 12 k q2 C C c vref 1 f r2 2.2 k q3 C C r vref1 4.75 k r3 560 q4 C C r vref2 4.22 k l1 0.36 h C C C r refadj 6.34 k l2 0.36 h C C C table 1 . component guide not e 4 : r lg1 are ocp setting resisters: 5k for lower ocp threshold, i ocp = 150mv/r ds(on) 10k for medium oc p threshold, i ocp = 250mv/r ds(on) >20k for disabling ocp function c v c c r p g l 1 q 1 q 2 g d s g d s g d s g d s l 2 q 3 q 4 c 3 c 4 c 5 r 3 r 2 2 2 2 5 1 1 1 7 1 8 1 9 2 0 2 1 2 1 2 4 2 3 1 5 9 1 6 3 4 5 7 6 8 1 4 1 3 1 0 1 2 v c c f s p g o o d e n p s i v i d v r e f r e f i n r e f a d j t a l e r t # t s n s p v c c h g a t e 1 b o o t 1 p h a s e 1 l g a t e 1 h g a t e 2 b o o t 2 p h a s e 2 l g a t e 2 g n d s n s v s n s c o m p g n d t h e r m / g n d r 1 s u p p l y v o l t a g e f r e q u e n c y s e l e c t i o n d r i v e r s u p p l y v o l t a g e o p t i o n a l s t r a p 1 r l g 1 o u t i n i n i n o u t o p a m p c o m p e n s a t i o n e x t e r n a l t h e r m i s t e r a p 3 5 9 8 a v c c r e n r p s i r p s i 2 r v r e f 1 r f s r t m r t m 2 r t a l e r t c v r e f r v r e f 2 c r e f i n r r e f a d j v r e f v p c c c p v c c v i n r h g 1 c b t 1 v i n r h g 2 c b t 2 v o u t c o u t c v i n 2 r v o u t r v g n d v g n d _ s n s v o u t _ s n s c v i n 1
ap 359 8a document number: ds 37261 rev. 2 - 2 3 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product pin description s pin number p in name function 1 boot1 high side gate driver supply of phase 1 2 hgate1 high side gate driver output of phase 1 3 en enable input 4 psi power saving inter face 5 vid voltage id input 6 refadj reference adjustment output 7 refin external reference input 8 vref output reference voltage. this is high precision voltage reference 9 fs frequency selection. connect a resistor from this pin to gnd to select the switching frequency 10 gndsns gnd sense. negative node of the remote voltage sense 11 vsns v out sense. positive node of the remote differential voltage sense 12 comp compensation. use this pin in combination with vsns to compensate the feedback loop of the converter 13 tsns temperature sensing input 14 talert# thermal alert. active low open drain output 15 vcc supply voltage 16 pgood open drain power good output 17 hgate2 high side gate driver output of phase 2 18 boot2 high side gate driver suppl y of phase 2 19 phase2 switch node of phase 2 20 lgate2 low side gate driver output of phase 2 21 pvcc driver supply voltage 22 gnd ground. must be connected to gnd on pcb 23 lgate1 low side gate driver output of phase 1 24 phase1 switch node of phas e 1 25 therm/gnd thermal connection to the pcb. must be connected to gnd on pcb
ap 359 8a document number: ds 37261 rev. 2 - 2 4 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product functional block diagram g a t e c o n t r o l l o g i c c u r r e n t b a l a n c e o t p o v p u v p i n t e r n a l r e g u l a t o r p o r r e f e r e n c e v o l t a g e g a t e c o n t r o l l o g i c s h d n p g o s c i l l a t o r p o w e r s a v i n g s e t t i n g v c c p v c c b o o t 1 h g a t e 1 p h a s e 1 l g a t e 1 b o o t 2 h g a t e 2 p h a s e 2 l g a t e 2 t h e r m / g n d f s p g o o d e n t s n s t a l e r t # p s i c o m p v s n s r e f i n g n d s n s v i d r e f a d j v r e f g n d p w m 1 p w m 2 e r r o r a m p l i f i e r + _ + + _ _ 8 6 5 1 0 7 1 1 1 2 4 1 4 1 3 3 1 6 9 2 2 2 5 2 0 1 9 1 7 1 8 2 3 2 4 2 1 1 5 2 1
ap 359 8a document number: ds 37261 rev. 2 - 2 5 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product absolute maximum ratings ( note 5 ) symbol parameter rating unit v cc , v pcc vcc, pvcc pi n voltage - 0.3 to 15 v v phase1 , v phase2 phase to gnd voltage <200ns - 5 to 32 v >200ns - 0.3 to 26 v boot1_phase1 , v boot2_phase2 boot to phase voltage - 0.3 to 15 v v boot1 , v boot2 boot to gnd voltage <200ns - 0.3 to 42 v >200ns - 0.3 to 30 v hgate1 , v hgate2 hgate to phase voltage <200ns - 5 to v boot_phasex +5 v >200ns - 0.3 to v boot_phasex +0.3 v lgate1 , v lgate2 lgate to gnd voltage <200ns - 5 to v in +5 v >200ns - 0.3 to v in +0.3 C other input, output or i/o pin voltage 0 to 6 v ja thermal resistance 40 oc/w p d power dissipation (t a = + 25oc) 2.5 w t j operating junction temperature range - 40 to + 150 oc t stg storage temperature - 65 to + 150 oc t lead lead temperature (soldering, 10sec) + 260 oc C esd(machine model) 200 v C esd(h uman body model) 2000 v note 5 : stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. these are stres s ratings only, and functional operation of the device at these or any other conditions beyond t hose indicated under recommended operati ng conditions is not implied. exposure to absolute maximum ratings for extended periods may affect device reliability . recommended operating conditions symbol parameter min max unit v cc , v pcc supply input voltage 4.5 13.2 v v out output voltage 0.3 2 v t a operating ambient temperature - 40 + 85 oc
ap 359 8a document number: ds 37261 rev. 2 - 2 6 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product electrical characteristics ( v cc = 12v, v pcc = 12v, t a = + 25oc, unless otherwise specified . ) symbol parameter conditions min typ max unit supply voltage i cc supply current hgate and lgate open, switching C 5 C ma i cc_q quiescent supply current no switching C 4 C ma i shdn shutdown supply current shutdown C 4 C ma por v ccrth under voltage lockout threshold for vcc C 3.9 4.1 4.3 v v cchys hysteresis for vcc C C 0.4 C v v pccrth under voltage lockout threshold for pvcc C 3.9 4.1 4.3 v v pcchys hysteresis for pvcc C C 0.4 C v reference voltage v ref reference voltage accuracy i ref = 100 a, t a = + 25oc 1.98 2.00 2.02 v i ref = 100 a, t a = 0 to + 150oc 1.97 C 2.03 ? v ref reference voltage load regulation i ref = 0 to 2ma - 5 C 5 mv i ref vref maximum output current C 10 C C ma error amplifier a o open loop dc gain guaranteed by design 70 80 C db g bw gain - bandwidth product c load = 5pf, guaranteed by design C 20 C mhz sr slew rate guaranteed by design 15 20 C v/ s i comp maximum current (sink and source) v comp = 1.6v 1.5 2.0 C ma frequency setting v fs fs voltage r fs = 33k ? C 1 C v C switching frequency setting range C 200 C 500 khz f osc free run switching frequenc y r fs = 33k ? 270 300 330 khz ? f osc switching frequency accuracy f osc = 200khz to 500khz - 15 C 15 % oscillator C maximum duty cycle C 35 40 C % C minimum duty cycle C C 0 C % ? v osc ramp amplitude v cc = 12v C 3.5 C v enable function v enih enable high threshold C 1.4 C C v v enil enable low threshold C C C 0.6 v
ap 359 8a document number: ds 37261 rev. 2 - 2 7 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product electrical characteristics ( cont. v cc = 12v, v pcc = 12v, t a = + 25oc, unless otherwise specified . ) symbol parameter conditions min typ max unit power saving interface v psih power saving int erface high threshold dual phase with fccm 1.5 C C v v psil power saving interface low threshold single phase with dcm C C 0.4 v v psim power saving interface intermediate threshold single phase with fccm 0.8 C 1.1 v power good t pg_dly delay time for pg ood from high to low C C 10 C s r pg internal power good pull low resistance C C C 150 gate driver i hg_src upper gate sourcing current v bootx - v phasex = 6v C 1.2 C a r hg_snk upper gate sinking resistance v ugatex - v phasex = 0.1v i ugatex = 100ma C 2 C ? i lg_src lower gate sourcing current v cc - v lgatex = 6v C 1.2 C a r lg_snk lower gate sinking resistance v lgatex = 0.1v i lgatex = 100ma C 1.4 C ? v boot boot diode forward voltage v pcc - v boot , i boot = 20ma C 0.8 C v protection v uvp output under voltage pro tection threshold C C C 0.5* v out v t uvp delay time for uvp triggered C C 50 C s v ovp output over voltage protection threshold C 1.4* v out C C v t ovp delay time for ovp triggered C C 50 C s i ocset lgate oc setting current C C 21.5 C a C built - in ma ximum ocp voltage C C 0.35 C v thermal protection t sd thermal shutdown threshold C + 150 + 160 + 170 oc t alert# minimum thermal alert threshold C + 120 + 130 + 140 oc v tsns temperature sense threshold C C 1.00 C v pwm - vid dynamic voltage control v ih logic high level C 1.5 C C v v il logic low level C C C 0.4 v v id vid voltage in high - z mode C C 1.1 C v current balance i ofs current balance sense offset C C 0 C a
ap 359 8a document number: ds 37261 rev. 2 - 2 8 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product performance characteristics v ref line regulation v ref load regulation v cc vs. i cc f osc vs. r rt f osc vs. v cc f osc vs. temperature 9 10 11 12 13 265 270 275 280 285 290 f osc (khz) v cc (v) 5.5 5.6 5.7 5.8 5.9 6.0 6.1 6.2 6.3 8 9 10 11 12 13 v cc (v) i cc (ma) 0 2 4 6 8 10 1.9960 1.9965 1.9970 1.9975 1.9980 1.9985 1.9990 1.9995 2.0000 v ref (v) i load (ma) 4 6 8 10 12 14 1.980 1.985 1.990 1.995 2.000 2.005 2.010 2.015 2.020 v ref (v) v cc (v) i load =0ma i load =2ma 10 100 10 100 1000 f osc (khz) r rt (k ? ) -60 -40 -20 0 20 40 60 80 100 120 140 160 260 265 270 275 280 285 290 295 300 f osc (khz) temperature ( o c)
ap 359 8a document number: ds 37261 rev. 2 - 2 9 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product performance characteristics (cont.) v ref vs. temperature v out vs. duty cycle en on waveform en on waveform (v in =12v, v out =1. 0 v, i out =0a) (v in =12v, v out =1. 0 v, i out = 6 0a) en off waveform en off waveform (v in =12v, v out =1. 0 v, i out =0a) (v in =12v, v out =1. 0 v, i out = 6 0a) time 400 s/div v en 2 v/div v out 0.5 v/div v phase1 1 0 v/div v phase2 1 0 v/div v en 2 v/div v out 0.5 v/div v phase1 1 0 v/div v phase2 1 0 v/div time 400 s/div v en 2 v/div v out 0.5 v/div v phase1 1 0 v/div v phase2 1 0 v/div v en 2 v/div v out 0.5 v/div v phase1 1 0 v/div v phase2 1 0 v/div time 400 s/div time 400 s/div -40 -20 0 20 40 60 80 100 120 140 1.970 1.975 1.980 1.985 1.990 1.995 2.000 2.005 2.010 v ref (v) temperature ( o c) 0 20 40 60 80 100 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v out (v) duty cycle (%)
ap 359 8a document number: ds 37261 rev. 2 - 2 10 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product performance characteristics (cont.) power on waveform power on waveform (v in =12v, v out =1. 0 v, i out =0a) (v in =12v, v out =1. 0 v, i out = 6 0a) power off waveform power off waveform (v in =12v, v out =1. 0 v, i out =0a) (v in =12v, v out =1. 0 v, i out = 6 0a) dead time 1 dead time 2 time 4 ms/div v cc 10v/div v out 0.5 v/div v hgate 20 v/div v lgate 1 0 v/div v cc 10v/div v out 0.5 v/div v hgate 20 v/div v lgate 1 0 v/div time 4 ms/div time 4 ms/div v cc 10v/div v out 0.5 v/div v hgate 20 v/div v lgate 1 0 v/div v cc 10v/div v out 0.5 v/div v hgate 20 v/div v lgate 1 0 v/div time 4 ms/div time 40n s /div v hgate 5 v/div v phase 5 v/div v lg ate 5 v/div v hgate 5 v/div v lgate 5 v/div time 40n s/div v phase 5 v/div v hg ate v lg ate v hg ate v lg ate v phase v phase
ap 359 8a document number: ds 37261 rev. 2 - 2 11 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product performance c haracteristics (cont.) under voltage protection over voltage protection (v in =12v, v out =1. 0 v) (v in =12v, v out =1. 0 v) over current protection over temperature protection (v in =12v, v out =1. 0 v) (v in =12v, v out =1. 0 v) pre - bias start - up (v in =12v , v out = 2v before power on ) time 400 s/div v out 0.5 v/div v pgood 2 v/div v hgate 20 v/div v out 1v/div v hgate 20 v/div v lgate 10 v/div time 400 s/div v pgood 2 v/div v lgate 10 v/div v out 1 v/div time 4m s/div v cc 5 v/div time 400 s/div v out 0.5 v/div v phase 10 v/div v pgood 2 v/div v out 0.5 v/div v pgood 2 v/div i out 50a /div time 2m s/div v phase 10 v/div v lgate1 10 v/div v lgate2 10 v/div
ap 359 8a document number: ds 37261 rev. 2 - 2 12 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information 1. overview the ap3598a is a dual - phase synchronous - rectified buck controller designed to deliver high quality output voltage for high power applications. the ic is capable of delivering up to 60a output current with embedded bootstrapped drivers that support 12v+12v driver capab ility. the built - in bootstrap diode simplifies the circuit design and reduces e xternal part count and pcb space. the output voltage is precisely regulated to the reference input that is dynamically adjustable by external voltage divider. the adjustable current balance is achieved by r ds(on) current sensing technique. the ap3598a fe atures comprehensive protection functions including over current protection, input/output under voltage protection, over volt age protection and over temperature protection. other features include adjustable soft start, adjustable operation frequency, and quick response to step load transient. with aforementioned functions, the ap3598a provides customer a compact, high efficiency, well - protected and cost effective solution. it uses u - qfn4 0 4 0 - 24 package. 2. power on reset a power on reset (por) circuitry co ntinuously monitors the supply voltage at vcc and pvcc pin. once the rising por threshold is exceeded, the ap3598a sets itself to active state and is ready to accept chip enable command. the rising por threshold is typically 4.1 v. 3. soft start the ap3598 a initiates its soft start cycle when en is released from ground once the por is granted. slew rate of voltage transition at refin and output voltage vsns during soft start and v refin jumping is controlled by the capacitor connected to the refin pin. thi s reduces inrush current to charge/discharge the large output capacitors during soft start and vid changing, and prevents ocp , ovp, uvp false trigger. 4. pre - bias function the ap3598a features pre - bias start - up capability. if the output voltage is pre - bia sed voltage, which makes vsns voltage higher than reference voltage refin. the error amplifier keeps comp voltage lower than the valley of the sawtooth waveform and makes pwm comparator s output low until the ramping refin voltage catches up the output volt age. the ap3598a keeps both upper and lower mosfets off until the first pulse takes place. 5. chip oscillator frequency programming a resistor r fs connected to fs pin programs the oscillator frequency as: fi gure 1 shows the relationship between oscillation frequency and r fs. r fs (k ? ) figure 1 . switching frequency vs. r fs ) ( ) ( 10000 khz k r f fs osc ? ?
ap 359 8a document number: ds 37261 rev. 2 - 2 13 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) 6. current balance the ap3598a extracts phase currents for current balance by parasitic on - resi stance of the lower switches when turned on as shown in figure 2. figure 2. r ds(on) current sensing scheme the gm amplifier senses the voltage drop across the lower switch and converts it into current signal when it turns o n. the sampled and held current is expressed as: where i lx is the phase x current in ampere, r ds(on) is the on - resistance of low side mosfet ( ? ), 12 a is a constant current to compensate the offset voltage of the current sensing circuit. the ap3598a tunes the duty cycle of each channel for current balance according to the sensed inductor current signals as show n in figure 3 . if the current of c hannel 1 is smaller than the current of channel 2, the ap3598a increases the duty cycle of the corresponding phase to increas e its phase current accordingly, vice versa. figure 3 . current balance scheme of ap3598a 7. power saving interface (psi) this is a multilevel input to support power saving features. the ap3598a supports dual phase with fccm and single phase with dcm and fccm. mode descriptions dcm discontinuous conduction mode decreases the switching frequency to imp rove the efficiency at light load fccm forced continuous conduction mode does not change the switching frequency when the inductor current goes to negative at light load. this mode is used to disable power saving features table 2 . description of operati ng modes as shown in table 2 , an input high voltage (>1.5v) will set the controller to dual phase with fccm mode; an input of intermediate level (between 0.8v and 1.1v) will set the controller to single phase with fccm mode; an input low voltage will set the controller to single phase with dcm mode. a 12 10 r i i 3 ) on ( ds lx csx ? ? ? ? ? ? s a m p l e & h o l d c u r r e n t b a l a n c e i c s 1 i c s 2 _ + r e f e r e n c e v o l t a g e + _ p h a s e i o f s + _ + _ pwm 1 pwm 2 comp i cs 2 i cs 1 + _ + ramp 1 ramp 2
ap 359 8a document number: ds 37261 rev. 2 - 2 14 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) 8. short circuit protection (scp) the ap3598a has over current (ocp) and output under voltage protection (uvp) functions. 8.1 ocp function the ap3598a detects voltage drop acr oss the lower mosfet (phase voltage) of channel 1 for over current protection when it is turned on. if phase voltage is lower than the user programmable voltage v ocp , the ap3598a asserts ocp and shuts down the converter. the v ocp level is as shown in table 3 . the over current i ocp can be calculated according to the on - resistance of the lower mosfet used. C >20k ? 10k ? 5k ? v ocp (mv) no ocp 250 150 table 3 . ocp level selection a resistor r ocset connected from lgate1 pin sets the o cp threshold value v ocset when startup. an internal current source i ocset (21.5 a typically), flowing through r ocset determines to select the v ocp level, which can be calculated using the following equation: if v ocset is lower tha n 150mv, v ocp will be set to 150mv; if v ocset is between 350mv and 150mv, v ocp will be set to 250mv; if v ocset is higher than 350mv, v ocp will be disabled. because the r ds(on) of mosfet increases with temperature, it is necessary to take this thermal effe ct into consideration in calculating ocp point. 8.2 uvp function the output voltage v sns is also monitored for under voltage protection. the uv threshold is set at 0.3v. the under voltage protection has 50 s triggered delay. when uvp is triggered, both hi gh side and low side are shutdown immediately. ocp and uvp are latched function, the ap3598a can power off, and then power on or en reset to restart again. 9. over voltage protection (ovp) the output voltage v sns is continuously monitored for over volta ge protection. when it is larger than 1.5 times as setting, the ovp function is triggered. the over voltage protection has 50 s t riggered delay. when ovp is triggered, lgate will go high and ugate will go low to discharge the output capacitor. 10. power g ood the pgood pin output is an open drain mosfet. the output is pulled low when the ap3598a shuts down. it is recommended to use a pull - up resistor between the values of 3k ? and 100k ? to a voltage source that is 5v or less. the pgood is in a valid state once the v cc voltage is greater than 1.2v. 11. thermal shutdown the ap3598a implements an internal thermal shutdown to protect itself if the junction temperature exceeds t j . tsns is the external thermistor temperature sensing input. talert# is an active low open drain output warning signal to indicate when either the controller has reached 80% percent of t jmax or mosfet has reached its threshold through the external thermi stor. ) on ( ds ocp ocp r v i ? ? ocset ocset r i ? ? ocset v
ap 359 8a document number: ds 37261 rev. 2 - 2 15 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) figure 4 . thermal alert and temperature sense 12. pwm - vid dynamic voltage control pwm - vid is a single - wire dynamic voltage control circuit driven by the pulse width modulation meth od. this circuit reduces the device pin count and enables a wide dynamic voltage range. the pwm - vid duty cycle determines the variable output voltage at refin, as shown in figure 5 . v min is the zero percent duty cycle voltage value. v max is the one hundre d percent duty cycle voltage value. the resolution of each voltage step (v step ) is determined by the number of available steps (n max ) and the selection of the dynamic voltage range (v max - v min ). n is the number of steps at a specific v out . n/n max ratio is e qual to the duty cycle. the dynamic voltage vid frequency (f swvid ) is determined by the unit pulse width (t u ) and the available step number n max (t vid = t u *n max , f vid = 1/ t vid ). t u is programmable. figure 5 . dynamic output v step , n max , v min , and v ma x are variables that determine v out . n max is limited by the unit pulse width and the minimum vid frequency. the dynamic voltage output could be implemented by the analog method with a switching device and a resistor network. a buffer is used as the switch ing device to create dynamic output. resistor network sets the minimum offset voltage. 12.1 circuit diagram figure 6 shows the analog circuit diagram for the pwm - vid dynamic voltage control. the buffer requires a stable, high precision voltage reference ( v ref ) for the linear output. the dynamic range of the circuit is determined by the resistor selection. resistor r refadj and capacitor c refin function as a filter for the pwm signal, and will affect the ripple voltage and the slew rate at the output (refin) during voltage transitions. i n t e r n a l d i e t e m p e r a t u r e s e n s o r e x t e r n a l t e m p e r a t u r e s e n s i n g c o m p a r a t o r a p 3 5 9 8 a o p e n d r a i n o u t p u t t a l e r t # t s n s r t a l e r t v r e f r t m 2 g n d r t m
ap 359 8a document number: ds 37261 rev. 2 - 2 16 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) figure 6 . pwm - vid analog circuit diagram spec description output voltage equation n max : total available voltage step number C out , n/n max ratio equals duty cycle C max : the output voltage of refin at one hundred percent duty cycle v min : the output voltage of refin at zero percent duty cycle v step : the resolution of the voltage step v out : the output voltage at refin f swvid : the dynamic voltage vid frequency table 4 . refin dynamic range there will be some ripple voltage at refin due to the nature of the pwm and filter. the error amplifier at refin will be able to tolerate a reasonable amount of ripple voltage. 12.2 integrating the buffer figure 7 shows a dynamic voltage control circuit with the integrated buffer. this defines the implementation of the vid and refadj functions. figure 7 . integrated buffer circuit max 1 n t u ? ) || ( r r 1 vref2 vref2 ref refadj vref r r v ? ? g n d g n d g n d i n p w m v c c g n d n c o e r r e f a d j c r e f i n r v r e f 1 r e f i n r v r e f 2 v r e f a b u f f e r step min v n v ? ? i n g n d g n d g n d g n d g n d i n p w m v i d v r e f r e f i n r e f a d j r r e f a d j c r e f i n r v r e f 2 r 1 5 r s t a n d b y q 5 d s g g n d a v c c o e o n c b u f f e r e x t e r n a l c o n t r o l v s t a n d b y b l o c k r v r e f 1 c o n t r o l l e r ) || ( r || 2 vref1 2 ref refadj vref refadj vref r r r r v ? ? max min max v - v n
ap 359 8a document number: ds 37261 rev. 2 - 2 17 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) 12.3 timing diagram figure 8 contains the details of the timing diagram. after vcc powers up, the controller generates the v r ef . refin settles at v boot before the gpu drives the vid pin. after the gpu powers up, v boot control will be pulled low by software. at the same time the vid is driven by a pwm signal, moving refin into the normal operating mode. when the gpu is going to s tandby, software will tri - state v id and v boot control, and an external control will enable r standby . figure 8 . time diagram 12.4 standby mode standby mode keeps the gpu in a low voltage state (in the range of 0.3v) for the quick recovery. as the gpu s teps into the standby mode, the resistor r standby and the switch q6 (parallel to the r vref2 and r boot ) set the standby voltage. the accuracy of the reference voltage in the standby mode could be reduced from the normal operating mode. refer to figure 9 for the illustration of the standby voltage. figure 9 . illustration for standby mode and adjustable v boot setting 12.5 voltage waveform and propagation delay figure 10 . the behavior of the buffer
ap 359 8a document number: ds 37261 rev. 2 - 2 18 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) 12.6 electrical charac teristics parameters sym min typ max unit notes buffer supply voltage C C v ref C v C unit pulse width t u C 27 C ns configurable buffer output rise time t r C 5 C ns C buffer output fall time t f C 5 C ns C rising and falling edge delay t C C 0.5 ns t=|t r - t f | propagation delay t pd C 10 C ns t pd =t phl =t plh propagation delay error t pd C C 0.5 ns t pd =t phl - t plh upper resister r vref1 C 4.75 C k C lower resister r vref2 C 4.22 C k C filter resister r refadj C 6.34 C k C boot mode resi ster r boot C C C k project specific standby mode resister r standby C 1.07 C k C filter capacitor c refin C 0.033 C f C 13. pwm compensation the output lc filter of a step down converter introduces a double pole, which contributes with - 40db/decade ga in slope and 180 degrees phase shift in the control loop. a compensation network among comp, vsns, and v out should be added. the compensation network is shown in figure 14 . the output lc filters consist of the output inductors and output capacitors. for tw o - phase convertor, when assuming that v in1 = v in2 = v in , l1 = l2 = l, the transfer function of the lc filter is given by: the poles and zero of the transfer functions are: the f lc i s the double - pole frequency of the two - phase lc filters, and f esr is the frequency of the zero introduced by the esr of the output capacitors. out esr esr c r f ? ? ? ? ? 2 1 1 ) 2 / 1 ( 1 2 ? ? ? ? ? ? ? ? ? ? out esr out out esr lc c r s c l s c r s gain out lc c l f ? ? ? ? ) 2 / 1 ( 2 1 ?
ap 359 8a document number: ds 37261 rev. 2 - 2 19 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) figure 11 . the output lc filter figure 12 . frequency response of the lc filters the pwm modulator is shown in figure 13 . the input is the output of the error amplifier and the output is the phase node. the transfer function of th e pwm modulator is given by: figure 13 . the pwm modulator the compensation network is shown in figure 14 . it provides a close loop transfer function with the highest zero crossover frequency and suff icient phase margin. the transfer function of error amplifier is given by: osc in pwm v v gain ? ? + - p w m c o m p a r a t o r o s c v o s c v i n d r i v e r d r i v e r p h a s e o u t p u t o f e r r o r a m p l i f i e r v p h a s e 1 v p h a s e 2 v o u t c o u t r e s r l 1 = l l 2 = l
ap 359 8a document number: ds 37261 rev. 2 - 2 20 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) the pole and zero frequencies of the transfer function are: figure 14 . compensation network the closed loop gain of the converter can be written as: figure 15 shows the asymptotic plot of the closed loop converter gain, and th e following guidelines will help to design the compensation network. using the below guidelines will give a compensation similar to the curve plotted. a stable closed loop has a - 20db/decade slope and a phase margin greater than 45 degree. 1. choose a val ue for r1, usually between 1k ? and 5k ? . 2. select the desired zero crossover frequency. use the following equation to calculate r2: 2 2 2 1 1 c r f z ? ? ? ? ? amp pwm lc gain gain gain ? ? 3 ) 3 1 ( 2 1 2 c r r f z ? ? ? ? ? ? sw o f f ? ? ) 10 / 1 ~ 5 / 1 ( 3 3 2 1 2 c r f p ? ? ? ? ? ) 3 3 1 ( ) 2 1 2 2 1 ( } 3 ) 3 1 ( 1 { ) 2 2 1 ( 1 3 1 3 1 ) 3 1 3 //( 1 ) 2 1 2 //( 1 1 c r s c c r c c s s c r r s c r s c r r r r sc r r sc r sc v v gain out comp amp ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 1 2 r f f v v r lc o in osc ? ? ? ? r 3 v o u t + - v r e f v c o m p c 3 c 1 r 2 c 2 r 1 f b ) 2 1 2 1 ( 2 2 1 1 c c c c r f p ? ? ? ? ? ? ?
ap 359 8a document number: ds 37261 rev. 2 - 2 21 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) 3. place the first zero f z1 before the out put lc filter double pole frequency f lc . calculate the c2 by the equation: 4. set the pole at the esr zero frequency f esr : calculate the c1 by the following equation: 5. set the second pole f p2 at the half of the switching frequency and also set the second zero f z2 at the output lc filter double pole f lc . the compensation gain should not exceed the error amplifier open loop gain. check the compensation gain a t f p2 with the capabilities of the error amplifier. combine the two equations will get the following component calculations: figure 15 . converter gain and frequency lc z sw p f f f f ? ? ? 2 2 5 . 0 esr p f f ? 1 75 . 0 2 2 1 2 ? ? ? ? ? lc f r c ? sw f r c ? ? ? 3 1 3 ? 1 2 2 2 2 1 ? ? ? ? ? ? esr f c r c c ? 1 2 1 3 ? ? ? lc sw f f r r lc z f f ? ? 75 . 0 1
ap 359 8a document number: ds 37261 rev. 2 - 2 22 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application in formation (cont.) 14. output inductor selection the duty cycle (d) of a buck converter is the function of the input voltage and output voltage. once an output voltage is fix ed, it can be written as: for two - phase converter, the ind uctor value (l) determines the sum of the two inductor ripple current, i p - p , and affects the load transient response. higher inductor value reduces the output capacitors ripple current and induces lower output ripple voltage. the ri pple current can be ap proximated by: where f sw is the switching frequency of the regulator. although the inductor value and frequency are increased and the ripple current and voltage are reduced, a tradeoff exists bet ween the inductors ripple current and the regulator load transient response time. a smaller inductor will give the regulator a faster load transient response a t the expense of higher ripple current. increasing the switching frequency (f sw ) also reduces the ripple current and voltage, but it will increase the switching loss of the mosfets and the power dissipation of the converter. the maximum ripple current occurs at the maximum in put voltage. a good starting point is to choose the ripple current to be approximately 30% of the maximum outp ut current. once the inductance value has been chosen, select an inductor that is capable of carrying the required peak current without going into saturation. in some types of inductors, especially core that is made of ferrite, the ripple current will incr ease abruptly when it saturates. this results in a larger output ripple voltage. 15. output capacitor selection output voltage ripple and the transient voltage deviation are factors that have to be taken into consideration when selecting output capacitors . higher capacitor value and lower esr reduce the output ripple and the load transient drop. therefore, selecting high performa nce low esr capacitors is recommended for switching regulator applications. in addition to high frequency noise related to mosfet turn - on and turn - off, the output voltage ripple includes the capacitance voltage drop v cout and esr voltage drop v esr caused by the ac peak - to - peak sum of the inductors current. the ripple voltage of output capacitors can be represented by: these two components constitute a large portion of the total output voltage ripple. in some applications, multiple capacitors have to be paralleled to achieve the desired esr value. if the output of the converter has t o support another load with high pulsating current, more capacitors are needed in order to reduce the equivalent esr and suppress the voltage ripple to a tolerable level. a small decoupling capacit or in parallel for bypassing the noise is also recommended, and the voltage rating of the output capacitors must be considered too. to support a load transient that is faster than the switching frequency, more capacitors are needed for reducing the voltage excursion during load step change. for getting same load transient response, the output capacitance of two - phase converter only needs to be around half of output capacitance of single - phase converter. another aspect of the capacitor selection is that the total ac current going through the capacitors has to be less than the rated rms current specified on the capacitors in order to prevent the capacitor from overheating. in out sw out in p p v v l f v v i ? ? ? ? ? ? 2 esr p p esr r i v ? ? ? ? ? sw out p p cout f c i v ? ? ? ? ? ? 8 in out v v d / ?
ap 359 8a document number: ds 37261 rev. 2 - 2 23 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) 16. input capacitor selection use small ceramic capacitors for high frequency decoupling and bulk capacitors to supply the surge current needed each time high - side mosfet turns on. place the small ceramic capacitors physically close to the mosfets and between the drain of high - side mosfet and the source of low - side mosfet. the important parameters for the bulk i nput capacitor are the voltage rating and the rms current rating. for reliable operation, select the bulk capacitor with voltage and current ratings above the maximum input voltage and largest rms current required by the circuit. the capacitor voltage rati ng should be at least 1.25 times greater than the maximum input voltage and a voltage rating of 1.5 times is a conservative g uideline. for two - phase converter, the rms current of the bulk input capacitor is roughly calculated as the following equation: for a through hole design, several electrolytic capacitors may be needed. for surface mount design, solid tantalum capacitors can be used, but caution must be exercised with regard to the capacitor surge current rating. 17. mosfet se lection the ap3598a requires two n - channel power mosfets on each phase. these should be selected based upon r ds(on) , gate supply requirements and thermal management requirements. in high current applications, the mosfet power dissipation, package selectio n, and heatsink are the dominant design factors. the power dissipation includes two loss components: conduction loss and switching loss. the conduction losses are the largest component of power dissipation for both the high - side and the low - side mosfets. these losses are distributed between the two mosfets according to duty factor (see the equations below). only the high - side mosfet has switching losses since the low - side mosfets body diode or an external schottky rectifier across the lower mosfet clamps t he switching node before the synchronous rectifier turns on. these equations assume linear voltage current transitions and do not adequately model power loss due to t he reverse - recovery of the low - side mosfet body diode. the gate - charge losses are dissipat ed by ap3598a and dont heat the mosfets. however, large gate - charge increases the switching interval t sw , which increases the high - side mosfet switching losses. ensure that all mosfets are within their maximum junction temperature at high ambient temperat ure by calculating the temperature rise according to package thermal resistance specifications. a separate heatsink may be necessary depending upon mosfet power, package type, ambient temperature and air f low. for the high - side and low - side mosfets, the l osses are approximately given by the following equations: p high - side =i out 2 (1+t c ) r ds(on) d+ 0.5i out v in t sw f sw p low - side =i out 2 (1+t c )(r ds(on) )(1 - d) where i out is the load current, t c is the temperature dependency of r ds(on) , f sw is the switching f requency, t sw is the switching interval, d is the duty cycle. note that both mosfets have conduction losses while the high - side mosfet includes an additional transition loss. the switching interval, t sw , is the function of the reverse transfer capacitance c rss . the (1+t c ) term is a factor in the temperature dependency of the r ds(on) and can be extracted from the r ds(on) vs. temperature curve of the power mosfet. 18. layout consideration in any high switching frequency converter, a correct layout is impo rtant to ensure proper operation of the regulator. with power devices switching at higher frequency, the resulting current transient will cause voltage spike across the interco nnecting impedance and parasitic circuit elements. as an example, consider the turn - off transition of the pwm mosfet. before turn - off condition, the mosfet is carrying the full load current. during turn - off, current stops flowing in the mosfet and is freewheeling by the low side mosfet and parasitic diode. any parasitic inductance of the circuit generates a large voltage spike during the switching interval. in general, using short and wide printed circuit traces should minimize interconnecting impedances and the magnitude of voltage spike. ) 2 1 ( 2 2 d d i i out rms ? ? ? ?
ap 359 8a document number: ds 37261 rev. 2 - 2 24 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product application information (cont.) besides, sign al and power grounds are to be kept separating and finally combined using ground plane construction or single point grounding . the best tie - point between the signal ground and the power ground is at the negative side of the output capacitor on each channel , where there is less noise. noisy traces beneath the ic are not recommended. figure 16 illustrates the layout, with bold lines indicating high current paths; these traces must be short and wide. components along the bold lines should be placed close toget her. below is a checklist for your layout: 1. keep the switching nodes (hgatex, lgatex, bootx, and phasex) away from sensitive small signal nodes since these nodes are fast moving signals. therefore, keep traces to these nodes as short as possible and the re should be no other weak signal traces in parallel with theses traces on any layer. 2. the signals going through theses traces have both high dv/dt and high di/dt with high peak charging and discharging curren t. the traces from the gate drivers to the m osfets (hgatex and lgatex) should be short and wide. 3. place the source of the high - side mosfet and the drain of the low - side mosfet as close as possible. minimizing the impedance with wide layout plane between the two pads reduces the voltage bounce of the node. in addition, the large layout plane between the drain of the mosfets (v in and phasex nodes) can get better heat sinking. 4. for experiment result of accurate current sensing, the current sensing components are suggested to place close to the ind uctor part. to avoid the noise interference, the current sensing trace should be away from the noisy switching nodes. 5. decoupling capacitors, the resistor - divider, and the boot capacitor should be close to their pins. (for example, place the decoupling ceramic capacitor as close as possible to the drain of the high - side mosfet). the input bulk capacitors should be close to the drain of the high - side mosfet, and the output bulk capacitors should be close to the loads. 6. the input capacitors ground sho uld be close to the grounds of the output capacitors and the low - side mosfet. 7. locate the resistor - divider close to the vref and refin pins to minimize the high impedance trace. in addition, vsns pin traces cant be close to the switching signal traces (hgatex, lgatex, bootx, and phasex). figure 16 . the layout of ap3598a ap3598a
ap 359 8a document number: ds 37261 rev. 2 - 2 25 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product ordering information package temperature range part number marking id packing u - qfn4 0 4 0 - 24 - 40 to +85 ? c ap3598a fn tr - g1 b3f 5000/ tape & reel mark ing information (top view) first l ine: logo and marking id second and third l ine s : date code y: y ear ww: w ork w eek of m olding m : a ssembly h ouse c ode xx: 7 th and 8 th d igits of batch no . p a c k i n g p a c k a g e p r o d u c t n a m e t r : t a p e & r e e l g 1 : g r e e n a p 3 5 9 8 a x x x x C r o h s / g r e e n f n : u - q f n 4 0 4 0 - 2 4
ap 359 8a document number: ds 37261 rev. 2 - 2 26 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product package outline dimensions (all d imensions in mm (inch) . ) (1) package type: u - qfn 4 0 4 0 - 2 4 (type b) 3 . 9 5 0 ( 0 . 1 5 6 ) 4 . 0 5 0 ( 0 . 1 5 9 ) 3 . 9 5 0 ( 0 . 1 5 6 ) 4 . 0 5 0 ( 0 . 1 5 9 ) 0 . 5 0 0 ( 0 . 0 2 0 ) t y p 0 . 3 5 0 ( 0 . 0 1 4 ) 0 . 4 5 0 ( 0 . 0 1 8 ) 0 . 1 9 0 ( 0 . 0 0 7 ) 0 . 2 9 0 ( 0 . 0 1 1 ) 0 . 0 0 0 ( 0 . 0 0 0 ) 0 . 0 5 0 ( 0 . 0 0 2 ) n 1 n 7 n 1 3 n 1 9 n 2 4 p i n 1 m a r k p i n # 1 i d e n t i f i c a t i o n 2 . 6 5 0 ( 0 . 1 0 4 ) 2 . 7 5 0 ( 0 . 1 0 8 ) 2 . 6 5 0 ( 0 . 1 0 4 ) 2 . 7 5 0 ( 0 . 1 0 8 ) 0 . 5 5 0 ( 0 . 0 2 2 ) 0 . 6 5 0 ( 0 . 0 2 6 ) 0 . 1 5 0 ( 0 . 0 0 6 ) t y p 0 . 6 3 0 ( 0 . 0 2 5 ) t y p
ap 359 8a document number: ds 37261 rev. 2 - 2 27 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product suggested pad layout (1) package t ype: u - qfn 4 0 4 0 - 2 4 (type b) dimensions x=y1 (mm)/(inch) y (mm)/(inch) x1 (mm)/(inch) y2 (mm)/(inch) value 2.84 0/ 0.112 4.30 0/ 0.169 0.340 / 0.013 0.60 0/ 0.024 dimensions x2=y3 (mm)/(inch) e (mm)/(inch) C C C C e y 2 x 1 e y x 2 y 3 x y 1
ap 359 8a document number: ds 37261 rev. 2 - 2 28 of 28 www.diodes.com november 2014 ? diodes incorporated ap3598a a product line of diodes incorporated new product important notice diodes incorporated makes no warranty of any kind, express or implied, with regards to this document, including, but not limited to, the implied warranties of merchantability and fitn ess for a particular purpose (and their equivalents under the laws of any jurisdiction). diodes incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. diodes incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does diodes incorporated convey any license unde r its patent or trademark rights, nor the rights of others. any customer or user of this document or products described herein in such appli cations shall assume all risks of such use and will agree to hold diodes incorporated and all the companies whose products are r epresented on diodes incorporated website, harmless against all damages. diodes incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthor ized sales channel. should customers purchase or use di odes incorporated products for any unintended or unauthorized application, customers shall indemnify and hold diodes incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising ou t of, directly or indirect ly, any claim of personal injury or death associated with such unintended or unauthorized application. products described herein may be covered by one or more united states, international or foreign patents pending. product nam es and markings noted herei n may also be covered by one or more united states, international or foreign trademarks. this document is written in english but may be translated into multiple languages for reference. only the english version of this document is the final and determina tive format released by diodes incorporated. life support diodes incorporated products are specifically not authorized for use as critical components in life support devices or system s without the express written approval of the chief executive officer o f diodes incorporated. as used herein: a. life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instruc tions for use provided in the labeling can be reasonably expected to result in significant injury to the user. b. a critical component is any component in a life support device or system whose failure to perform can be reasonably expe cted to cause the failure of the life support device or to affect its safety or effectiveness. customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support d evices or systems, and acknowledge and a gree that they are solely responsible for all legal, regulatory and safety - related requirements concerning their products and any use of diodes incorporated products in such safety - critical, life support devices or systems, notwithstanding any devices - or systems - related information or support that may be provided by diodes incorporated. further, customers must fully indemnify diodes incorpora ted and its representatives against any damages arising out of the use of diodes incorporated products in such safe ty - critical, life support devices or systems. copyright ? 201 4 , diodes incorporated www.diodes.com

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